The present invention refers to a digital to analog conversion circuit able to transform an input digital signal having n bit in a signal having a thermometric code and to convert it in an analog output signal. It also refers to a digital to analog conversion method of the type above mentioned, and to a digital to analog converter comprising a sigma delta modulator and a digital to analog conversion circuit of the type above mentioned.
In the realisation of a digital to analog converter (DAC) realised with modular elements, for instance capacitive, there are some problems related to the physical realisation of the circuit that limit the performances particularly for what concerns the linearity. For example the converters with capacitive elements are based on the modularity of the elements (capacitors) and on the mutual precision (matching) of the modules. The precision with which the capacitive elements could be realised is related prevalently to the characteristics of the technology, therefore, having fixed the capacitor value of the single module, usually it is not possible to overcome the intrinsic limit of the technology in the general performances of the converter.
In the case of oversampled DAC converters, that is the frequency range f in which the signal is comprised is smaller than half of the sampling frequency fs/2 at least of a factor two, particularly when the oversampling relationship OSR=(fs/2)/f overcomes some units, there are some techniques to reduce the process tolerance effect of the capacitors in the frequency interval f of the signal. A technique is that which uses a mixing circuit (scrambler) that performs this function through the mixing of the use of capacitive elements. Particularly, one among the mixing techniques foresees that the capacitors, through which the conversion is effected, are used in a cyclical way. With this technique the noise introduced by the capacitors tolerances is moved prevalently to high frequency and the converter becomes more linear. The mixing technique described presents sure advantages, but it has a problem that in the practise has limited the use strongly, that is the presence of tones (lines in the converter error spectrum) which show in a particularly evident way in presence of a constant or very small input signal.
In the U.S. Pat. No. 5,404,142 is described a more stadiums mixer circuit with cells that connect directly or to the opposite the inputs and the outputs. This solution has not the tone problem, but it is based on a very complex architecture that grows with the increase of the number of used bits and it is however limited to applications with a number of modular elements that are a power of two.
In the article by R. Radke, A. Eshraghi, T. Fiez xe2x80x9cA Spurious Free Delta Sigma DAC Using Rotated Data Weighted Averaging,xe2x80x9d Proceedings of the IEEE 1999 CICC, Pag. 125-128, a rotation technique of the use of the modular elements is used which changes the sequence occasionally by means of a graph that represents the possible sequences. It succeeds in obviating to the tone problem, but the authors state that applying their solution to converters with more levels causes an unimaginable complexity. For example with 8 levels (3 bit) there are 5040 possibilities.
In view of the state of the art described, an object of the present invention is that of obtaining a digital to analog conversion circuit able to transform a digital input signal having n bit in a signal having a thermometric code and to convert it in an analog output signal that has the lowest possible noise in the signal band.
Another object is that of reducing if not eliminating the tone presence, that is the lines in the output signal spectrum.
A further object is that of obtaining a circuit having a reduced complexity, such as to avoid a meaningful impact on the dimensions for its realisation.
In accordance to the present invention, these and other objects are reached by means of a digital to analog conversion circuit able to transform a digital input signal having n bit in an analog output signal comprising: a thermometric decoder having said digital input signal in input and able to produce said signal having a thermometric code with 2nxe2x88x921 bit in output; a digital to analog converter with modular elements including 2nxe2x88x921 controlled switches; a shift register able to receive said digital signal having 2nxe2x88x921 bit in a data input and able to produce 2nxe2x88x921 control signals of said controlled switches in output; a delay circuit of said input digital signal having the output connected to a shift input of said shift register and able to produce a delayed digital signal in output in order to make said digital signal having 2nxe2x88x921 bit shift of a number of bit equal to the value of said delayed digital signal; characterised by further comprising a generator of a digital random number selected in a range of prefixed values and having a prefixed probability of occurrence; an adder node able to receive said random digital number and said delayed digital signal in input whose output is connected to said shift input of said shift register.
Such objects are furthermore reached by means of an analog digital conversion method able to transform an input digital signal having words of n bit in an analog output signal comprising the following phases: transforming said input words in words having a thermometric code; applying said words having a thermometric code to a shift register; providing the words coming from said shift register to a digital to analog converter with modular elements; making the words contained in said register shift by a value equal to the preceding word; characterised by comprising the phase of making the words contained in said register shift by a further prefixed value on times with a prefixed probability.
Such objects are also reached by means of a method of digital to analog conversion of a digital input signal having a thermometric code in an analog signal, said input signal is constituted by a first digital word and by a second digital word in succession to said first digital word, comprising the following phases: adding said first and said second digital word; applying said sum as input signal of a digital to analog converter with modular elements; characterised in that the phase of adding said first and said second digital word comprises also the phase of adding a random digital number selected in a prefixed range values and having a prefixed occurrence probability.
Furthermore they are reached by means of a digital to analog converter comprising a sigma delta modulator and a digital to analog conversion circuit in accordance with the claim 1.
Thanks to the present invention it is possible to realise a circuit whose complexity does not grow with the increasing of the converter level number and therefore it is usable also in DAC with an elevated number of bit.